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 PD - 91852E
RADIATION HARDENED POWER MOSFET SURFACE MOUNT (SMD-2)
Product Summary
Part Number Radiation Level RDS(on) IRHNA57064 100K Rads (Si) 0.0056 IRHNA53064 300K Rads (Si) 0.0056 IRHNA54064 600K Rads (Si) 0.0056 ID 75*A 75*A 75*A
IRHNA57064 60V, N-CHANNEL
4#
TECHNOLOGY
c
IRHNA58064 1000K Rads (Si) 0.0065 75*A International Rectifier's R5TM technology provides high performance power MOSFETs for space applications. These devices have been characterized for Single Event Effects (SEE) with useful performance up to an LET of 80 (MeV/(mg/cm2)). The combination of low RDS(on) and low gate charge reduces the power losses in switching applications such as DC to DC converters and motor control. These devices retain all of the well established advantages of MOSFETs such as voltage control, fast switching, ease of paralleling and temperature stability of electrical parameters.
SMD-2
Features:
n n n n n n n n n n
Single Event Effect (SEE) Hardened Ultra Low RDS(on) Low Total Gate Charge Proton Tolerant Simple Drive Requirements Ease of Paralleling Hermetically Sealed Surface Mount Ceramic Package Light Weight
Absolute Maximum Ratings
Parameter
ID @ VGS = 12V, TC = 25C ID @ VGS = 12V, TC = 100C IDM PD @ TC = 25C VGS EAS IAR EAR dv/dt TJ T STG Continuous Drain Current Continuous Drain Current Pulsed Drain Current Max. Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction Storage Temperature Range Pckg. Mounting Surface Temp. Weight * Current is limited by internal wire diameter For footnotes refer to the last page 75* 75* 300 300 2.4 20 863 75 30 4.4 -55 to 150 300 (for 5s) 3.3 (Typical)
Pre-Irradiation
Units A
W
W/C
V mJ A mJ V/ns
o
C
g
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1
9/5/01
IRHNA57064
Pre-Irradiation
Electrical Characteristics @ Tj = 25C (Unless Otherwise Specified)
Parameter
BVDSS Drain-to-Source Breakdown Voltage BV DSS/T J Temperature Coefficient of Breakdown Voltage RDS(on) Static Drain-to-Source On-State Resistance VGS(th) Gate Threshold Voltage gfs Forward Transconductance IDSS Zero Gate Voltage Drain Current
Min
60 -- -- 2.0 45 -- -- -- -- -- -- -- -- -- -- -- --
Typ Max Units
-- 0.065 -- -- -- -- -- -- -- -- -- -- -- -- -- -- 4.0 -- -- 0.0056 4.0 -- 10 25 100 -100 160 55 65 35 125 75 50 -- V V/C V S( ) A
Test Conditions
VGS = 0V, ID = 1.0mA Reference to 25C, ID = 1.0mA VGS = 12V, ID = 75A VDS = VGS, ID = 1.0mA VDS > 15V, IDS = 75A VDS=48V ,VGS=0V VDS = 48V, VGS = 0V, TJ = 125C VGS = 20V VGS = -20V VGS =12V, ID = 35A VDS = 30V VDD = 30V, ID = 35A, VGS =12V, RG = 2.35
IGSS IGSS Qg Q gs Q gd td(on) tr td(off) tf LS + LD
Gate-to-Source Leakage Forward Gate-to-Source Leakage Reverse Total Gate Charge Gate-to-Source Charge Gate-to-Drain (`Miller') Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Inductance
nA nC
ns
nH
Measured from the center of drain pad to center of source pad VGS = 0V, VDS = 25V f = 1.0MHz
Ciss C oss C rss
Input Capacitance Output Capacitance Reverse Transfer Capacitance
-- -- --
6080 2310 90
-- -- --
pF
Source-Drain Diode Ratings and Characteristics
Parameter
IS ISM VSD t rr Q RR ton Continuous Source Current (Body Diode) Pulse Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min Typ Max Units
-- -- -- -- -- -- -- -- -- -- 75* 300 1.3 200 538
Test Conditions
A
V nS nC
Tj = 25C, IS = 75A, VGS = 0V Tj = 25C, IF = 35A, di/dt 100A/s VDD 25V
Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by LS + LD.
Thermal Resistance
Parameter
RthJC RthJ-PCB Junction-to-Case Junction-to-PC board
Min Typ Max Units
-- -- -- 1.6 0.42 --
C/W
Test Conditions
soldered to a 2" square copper-clad board
Note: Corresponding Spice and Saber models are available on the G&S Website. For footnotes refer to the last page
2
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Radiation Characteristics
IRHNA57064
International Rectifier Radiation Hardened MOSFETs are tested to verify their radiation hardness capability. The hardness assurance program at International Rectifier is comprised of two radiation environments. Every manufacturing lot is tested for total ionizing dose (per notes 5 and 6) using the TO-3 package. Both pre- and post-irradiation performance are tested and specified using the same drive circuitry and test conditions in order to provide a direct comparison.
Table 1. Electrical Characteristics @ Tj = 25C, Post Total Dose Irradiation
Parameter
BVDSS VGS(th) IGSS IGSS IDSS RDS(on) RDS(on) VSD Drain-to-Source Breakdown Voltage Gate Threshold Voltage Gate-to-Source Leakage Forward Gate-to-Source Leakage Reverse Zero Gate Voltage Drain Current Static Drain-to-Source On-State Resistance (TO-3) Static Drain-to-Source On-State Resistance (SMD-2) Diode Forward Voltage Up to 600K Rads(Si)1 1000K Rads (Si)2 Units Min Max Min Max 60 2.0 -- -- -- -- -- -- -- 4.0 100 -100 10 0.0061 0.0056 1.3 60 1.5 -- -- -- -- -- -- -- 4.0 100 -100 10 0.0071 0.0065 1.3 V nA A V
Test Conditions
VGS = 0V, ID = 1.0mA VGS = VDS, ID = 1.0mA VGS = 20V VGS = -20 V VDS=48V, VGS =0V VGS = 12V, ID =45A VGS = 12V, ID =45A VGS = 0V, IS = 45A
1. Part numbers IRHNA57064, IRHNA53064 and IRHNA54064 2. Part number IRHNA58064
International Rectifier radiation hardened MOSFETs have been characterized in heavy ion environment for Single Event Effects (SEE). Single Event Effects characterization is illustrated in Fig. a and Table 2.
Table 2. Single Event Effect Safe Operating Area
Ion Kr Xe Au LET MeV/(mg/cm2)) 39.2 63.3 86.6 Energy (MeV) 300 300 2068 VDS (V) Range (m) @VGS=0V @VGS=-5V @VGS=-10V @VGS=-15V @VGS=-20V 37.4 60 60 60 52 34 29.2 46 46 35 25 15 106 35 35 27 20 14
70 60 50 40 30 20 10 0 0 -5 -10
VGS
Kr Xe Au
VDS
-15
-20
Fig a. Single Event Effect, Safe Operating Area
For footnotes refer to the last page
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3
IRHNA57064
Pre-Irradiation
1000
100
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
VGS 15V 12V 10V 9.0V 8.0V 7.0V 6.0V BOTTOM 5.0V TOP
1000
VGS 15V 12V 10V 9.0V 8.0V 7.0V 6.0V BOTTOM 5.0V TOP
100
5.0V
5.0V
10 0.1
20s PULSE WIDTH T = 25 C
J 1 10 100
10 0.1
20s PULSE WIDTH T = 150 C
J 1 10 100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
2.0
TJ = 25 C TJ = 150 C
R DS(on) , Drain-to-Source On Resistance (Normalized)
ID = 75A
I D , Drain-to-Source Current (A)
1.5
100
1.0
0.5
10 5.0
15
V DS = 25V 20s PULSE WIDTH 7.0 7.5 5.5 6.0 6.5 8.0
0.0 -60 -40 -20
VGS = 12V
0 20 40 60 80 100 120 140 160
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature ( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
4
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Pre-Irradiation
IRHNA57064
10000
8000
VGS , Gate-to-Source Voltage (V)
VGS = 0V, f = 1MHz Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + Cgd
20
ID = 35A 45A
VDS = 48V VDS = 30V
16
C, Capacitance (pF)
6000
Ciss C oss
12
4000
8
2000
4
0 1
C rss
10 100
0 0 25 50 75
FOR TEST CIRCUIT SEE FIGURE 13
125 150 175 100 200
VDS , Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000
1000
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY R
DS(on)
I D , Drain Current (A)
100
100us
TJ = 150 C TJ = 25 C
100
1ms 10ms
10
10 0.4
V GS = 0 V
0.6 0.8 1.0 1.2 1.4 1.6
1
TC = 25 C TJ = 150 C Single Pulse
1 10 100 1000
VSD ,Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
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5
IRHNA57064
Pre-Irradiation
200
LIMITED BY PACKAGE
VGS
150
VDS
RD
D.U.T.
+
RG
I D , Drain Current (A)
-VDD
VGS
Pulse Width 1 s Duty Factor 0.1 %
100
Fig 10a. Switching Time Test Circuit
50
VDS 90%
0 25 50 75 100 125 150
TC , Case Temperature ( C)
10% VGS
Fig 9. Maximum Drain Current Vs. Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
1
Thermal Response (Z thJC )
D = 0.50 0.1 0.20 0.10 0.05 0.02 0.01
SINGLE PULSE (THERMAL RESPONSE)
0.01
0.001 0.00001
Notes: 1. Duty factor D = t 1 / t 2 2. Peak TJ = P DM x Z thJC + TC 0.1 0.0001 0.001 0.01 1
P DM t1 t2
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
6
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Pre-Irradiation
IRHNA57064
2000
EAS , Single Pulse Avalanche Energy (mJ)
1 5V
1500
TOP BOTTOM ID 34A 47A 75A
VD S
L
D R IV E R
RG
D .U .T.
IA S
.
1000
+ V - DD
A
VGS 20V
tp
0 .0 1
500
Fig 12a. Unclamped Inductive Test Circuit
0 25 50 75 100 125 150
V (B R )D S S tp
Starting TJ , Junction Temperature ( C)
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
IAS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
50K
QG
12V
.2F .3F
12 V
QGS VG QGD
VGS
3mA
D.U.T.
+ V - DS
Charge
IG
ID
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
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7
IRHNA57064
Pre-Irradiation
Pulse width 300 s; Duty Cycle 2% Total Dose Irradiation with VGS Bias.
12 volt VGS applied and VDS = 0 during irradiation per MIL-STD-750, method 1019, condition A. Total Dose Irradiation with VDS Bias. 48 volt VDS applied and VGS = 0 during irradiation per MlL-STD-750, method 1019, condition A.
Footnotes:
Repetitive Rating; Pulse width limited by
maximum junction temperature. VDD = 25V, starting TJ = 25C, L= 0.3 mH Peak IL = 75A, VGS = 12V ISD 45A, di/dt 196A/s, VDD 60V, TJ 150C
Case Outline and Dimensions -- SMD-2
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. Data and specifications subject to change without notice. 09/01
8
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